# FPM DRAM (Fast Page Mode DRAM)

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FPM DRAM (Fast Page Mode Dynamic Random Access Memory) is a dynamic memory with the fast page access which ensures a higher perfomance than the conventional dynamic random access memory (DRAM).[1] The main dfference from the previous generation of memory is the support of abbreviated addresses. If the next requested cell is in the same line as the previous one, its address is uniquely determined by only the column number and the line number is not needed. How is this achieved? When using the normal DRAM the RAS (Remote Access Services) [2] signal is desactivated after reading data to prepare the chip for the next exchange cycle. FPM-DRAM controller keeps RAS in the low state to get rid of the retransmission of the row number.

## History

FPAM memory appeared in 1990. It used a 64-bit bus width, a voltage of 5 volts and had a capacity of up to 200 Mbit per second at a frequency of 25 MHz. In 1995 EDO DRAM (Extended Data Out DRAM) (40 MHz) replaced FPAM and was replaced later in 1996 by SDRAM (up to 133 MHz). There are quite a few different dynamic memory options, slightly different from each other in the principles of data access. The conventional DRAM dynamic memory has been out of use for a long time now. In the mid-90’s it was replaced by a modification of the PM DRAM dynamic memory (Page Mode DRAM) - FPM DRAM memory. The basic difference from FP DRAM memory was in the support of the stored addresses. That is, if the new word, which is read from memory, is in the same line as the previous one, then the address to the memory array is not required, and the data selection is being carried out from the “data buffer” by the column number. In the case of reading data from memory arrays, this helped to significantly reduce the reading time. However, writing data was implemented in the same way as in the PM DRAM memory. Also, not always the data reads were located in the same line. As a result, the performance gain was strongly dependent on the type of software working on computers. The gain could be significant or the work could slow down, due to the additional expenses on the line number analysis of the previous reading operation.

FPM DRAM System:

## Application

The dynamic memory with the fast page access is actively used by 80386 and 80486 chips. [3]

## Special features

The main difference from the previous generation of memory is the support of abbreviated addresses. If the next requested cell is in the same line as the previous one, its address is uniquely determined by only the column number and the line number is not needed. How is this achieved? When using the normal DRAM the RAS (Remote Access Services) signal is desactivated after reading data to prepare the chip for the next exchange cycle. FPM-DRAM controller keeps RAS in the low state to get rid of the retransmission of the row number. When using the sequential reading of memory cells (as well as the processing of compact one- or two-kilobyte data structures), access time is reduced by 40%, and even more, because the processed line is in an internal buffer chip, and there is no need to access the matrix memory! [4]!

## Note

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1. FPM (Fast Page Mode) DRAM [Electronic resource] : Material from http://www.aten.ru/: — Access mode: http://www.aten.ru/articles/artview.php?idx=23
2. Remote Access Services [Electronic resource] : Material from http://rsdn.ru/: — Access mode: http://rsdn.ru/article/net/rasstat.xml
3. Static and dynamic RAM [Electronic resource] : Material from http://pandia.ru/: — Access mode: http://pandia.ru/text/78/135/91022.php
4. Memory - from the depths of time to our days : Material from http://citforum.ru/: — Access mode: http://citforum.ru/book/optimize/ram.shtml