Handel-C

From Bauman National Library
This page was last modified on 8 June 2016, at 20:26.
Handel-C
Paradigm Imperative (procedural, structured), concurrent
Designed by Oxford University Computing Laboratory
Developer ESL; Celoxica; Agility; Mentor Graphics
Stable release v3.0
Typing discipline Static, manifest, nominal, inferred
Website www.mentor.com/products/fpga/handel-c/
Major implementations
Celoxica DK

Handel-C is a high-level programming language which targets low-level hardware, most commonly used in the programming of FPGAs. It is a rich subset of C, with non-standard extensions to control hardware instantiation with an emphasis on parallelism. Handel-C is to hardware design what the first high-level programming languages were to programming CPUs. Unlike many other design languages that target a specific architecture Handel-C can be compiled to a number of design languages and then synthesised to the corresponding hardware. This frees developers to concentrate on the programming task at hand rather than the idiosyncrasies of a specific design language and architecture.

History

The historical roots of Handel-C are in a series of Oxford University Computing Laboratory hardware description languages developed by the hardware compilation group. Handel HDL evolved into Handel-C around early 1996. The technology developed at Oxford was spun off to mature as a cornerstone product for Embedded Solutions Limited (ESL) in 1996. ESL was renamed Celoxica in September 2000.

Handel-C was adopted by many University Hardware Research groups after its release by ESL, as a result was able to establish itself as a hardware design tool of choice within the academic community, especially in the United Kingdom.

In early 2008, Celoxica's ESL business was acquired by Agility, which developed and sold, among other products, ESL tools supporting Handel-C.

In early 2009, Agility ceased operations after failing to obtain further capital investments or credit.

In January 2009, Mentor Graphics acquired Agility's C synthesis assets.

Other subset C HDL's that developed around the same time are Transmogrifier C in 1994 at University of Toronto (now the FpgaC open source project) and Streams-C at Los Alamos National Laboratory (now licensed to Impulse Accelerated Technologies under the name Impulse C).

Syntax

The subset of C includes all common C language features necessary to describe complex algorithms. Like many embedded C compilers,floating point data types were omitted. Floating point arithmetic is supported through external libraries that are very efficient.

Parallel programs

In order to facilitate a way to describe parallel behaviour some of the CSP keywords are used, along with the general file structure of Occam. For example, to make parralel computation, operator par is used:

static unsigned 8 a = 2;
static unsigned 8 b = 1;
par
{
    a++;
    b = a+10;
}

The result is a=3; b=12;

To make a sequental computation, the usual C-style, one should use seq statement:

static unsigned 8 a = 2;
static unsigned 8 b = 1;
seq
{
    a++;
    b = a+10;
}

The result is a=3; b=13;

It is also possible to describe parallel behaviour with several main functions: each main creates independent program branch. Each main can have different frequency, with which it computes on FGPA.

Signal

Sometimes one needs to use recently computed value. For this, signal type exsists. Variable of signal type exists only for 1 tact. For example:

signal unsigned 8 a;
static unsigned 8 b;
par
{
    a = 7;
    b = a;
}

Result: a = 0, b = 7.

signal unsigned 8 a;
static unsigned 8 b;
seq
{
    a = 7;
    b = a;
}

Result: a = 0, b = 0.

Channels

Channels provide communication between parallel threads, one of the paths outputs data onto the channel and the other parallel thread can read the data. Channels can be created with or without a FIFO capability. For a channel without a FIFO the first thread to execute the channel read (or write) command waits until the corresponding write (or read) is executed in the other communicating thread. In this way the sender and receiver rendezvous and can pass a datum from one to the other and so synchronize their operation in a cooperative manner.

Scope and variable sharing

The scope of declarations are limited to the code blocks ({ ... }) in which they were declared, the scope is hierarchical in nature as declarations are in scope within sub blocks.

For example:

int a;

void main(void)
{
   int b;
   /* "a" and "b" are within scope */
   {
     int c;
     /* "a", "b" and "c" are within scope */ 
   }
   {
     int d;
     /* "a", "b" and "d" are within scope */  
   }
}

Extensions to the C language

In addition to the effects the standard semantics of C have on the timing of the program, the following keywords are reserved for describing the practicalities of the FPGA environment or for the language elements sourced from Occam:

Types and objects Expressions Statements

chan


chanin


chanout


macro expr


external


external_divide


inline


interface


internal


internal_divide


mpram


macro proc


ram


rom


sema


shared


signal


typeof


undefined


wom

< ... > (type clarifier)


[ : ] (bit range selection)


\\ (drop)


<- (take)


@ (concatenation operator)


select


width


(send into channel) !


(read from channel) ?


delay


ifselect


set intwidth


let … ; in


par


prialt


releasesema


set clock


set family


set part


set reset


seq


try { … } reset


trysema


with


Scheduling

In Handel-C, assignment and the delay command take one cycle. All other operations are "free". This allows programmers to manually schedule tasks and create effective pipelines. By arranging loops in parallel with the correct delays, pipelines can massively increase data throughput, at the expense of increased hardware resource use.

Useful links

  1. IDE
  2. Manual